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19-4420; Rev 0; 1/09
Ultrasound VGA Integrated with CW Octal Mixer
General Description
The MAX2036 8-channel variable-gain amplifier (VGA) and programmable octal mixer array is designed for high linearity, high dynamic range, and low-noise performance targeting ultrasound imaging and Doppler applications. Each amplifier features differential inputs and outputs and a total gain range of 50dB (typ). In addition, the VGAs offer very low output-referred noise performance suitable for interfacing with 10-bit ADCs. The MAX2036 VGA is optimized for less than 0.5dB absolute gain error to ensure minimal channel-to-channel ultrasound beamforming focus error. The device's differential outputs are designed to directly drive ultrasound ADCs through an external passive anti-aliasing filter. A switchable clamp is also provided at each amplifier's output to limit the output signals, thereby preventing ADC overdrive or saturation. Dynamic performance of the device is optimized to reduce distortion to support second-harmonic imaging. The device achieves a second-harmonic distortion specification of -62dBc at VOUT = 1.5VP-P and fIN = 5MHz, and an ultrasound-specific* two-tone third-order intermodulation distortion specification of -52dBc at VOUT = 1.5VP-P and fIN = 5MHz. The MAX2036 also integrates an octal quadrature mixer array and programmable LO phase generators for a complete CW beamforming solution. The LO phase selection for each channel can be programmed using a digital serial interface and a single high-frequency clock or the LOs for each complex mixer pair can be directly driven using separate 4 x LO clocks. The serial interface is designed to allow multiple devices to be easily daisy-chained in order to minimize program interface wiring. The LO phase dividers can be programmed to allow 4, 8, or 16 quadrature phases. The input path of each CW mixer consists of a selectable lowpass filter for optimal CWD noise performance. The outputs of the mixers are summed into I and Q differential current outputs. The mixers and LO generators are designed to have exceptionally low noise performance of -155dBc/Hz at 1kHz offset from a 1.25MHz carrier. The MAX2036 operates from a +5.0V power supply, consuming only 120mW/channel in VGA mode and 269mW/channel in normal power CW mode. A lowpower CW mode is also available and consumes only 226mW/channel. The device is available in a lead-free 100-pin TQFP package (14mm x 14mm) with an exposed pad. Electrical performance is guaranteed over a 0C to +70C temperature range.
Features
8-Channel Configuration High Integration for Ultrasound Imaging Applications Pin Compatible with the MAX2035 Ultrasound VGA VGA Features Maximum Gain, Gain Range, and Output-Referred Noise Optimized for Interfacing with 10-Bit ADCs Maximum Gain of 39.5dB Total Gain Range of 50dB -60nV/Hz Ultra-Low Output-Referred Noise at 5MHz 0.5dB Absolute Gain Error 120mW Consumption per Channel Switchable Output VGA Clamp Eliminating ADC Overdrive Fully Differential VGA Outputs for Direct ADC Drive Variable Gain Range Achieves 50dB Dynamic Range -62dBc HD2 at VOUT = 1.5VP-P and fIN = 5MHz Two-Tone Ultrasound-Specific* IMD3 of -52dBc at VOUT = 1.5VP-P and fIN = 5MHz CWD Mixer Features Low Mixer Noise of -155dBc/Hz at 1kHz Offset from 1.25MHz Carrier Serial-Programmable LO Phase Generator for 4, 8, 16 LO Quadrature Phase Resolution Optional Individual Channel 4 x fLO LO Input Drive Capability 269mW Power Consumption per Channel (Normal Power Mode) and 226mW Power Consumption per Channel (Low-Power Mode) CWD Implementation Is Fully Compliant with All Patents Related to Ultrasound Imaging Techniques
MAX2036
Ordering Information
PART MAX2036CCQ+D MAX2036CCQ+TD TEMP RANGE 0C to +70C 0C to +70C PIN-PACKAGE 100 TQFP-EP 100 TQFP-EP
+Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape-and-reel package. D = Dry packing. EP = Exposed pad. *See the Ultrasound-Specific IMD3 Specification in the Applications Information section. Pin Configuration appears at end of data sheet. 1
Applications
Ultrasound Imaging Sonar
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Ultrasound VGA Integrated with CW Octal Mixer MAX2036
ABSOLUTE MAXIMUM RATINGS
VCC, VREF to GND .................................................-0.3V to +5.5V Any Other Pins to GND...............................-0.3V to (VCC + 0.3V) CW Mixer Output Voltage to GND (CW_IOUT+, CW_IOUT-, CW_QOUT+, CW_QOUT-) ................................................13V VGA Differential Input Voltage (VGIN_+, VGIN_-)............8.0VP-P Analog Gain Control Differential Input Voltage (VG_CTL+, VG_CTL-) ..................................................8.0VP-P CW Mixer Differential Input Voltage (CWIN_+, CWIN_-).......................................................8.0VP-P CW Mixer LVDS LO Differential Input Voltage..................8.0VP-P Continuous Power Dissipation (TA = +70C) 100-Pin TQFP (derated 45.5mW/C above +70C)..3636.4mW Operating Temperature Range...............................0C to +70C Junction Temperature ......................................................+150C JC (Note 1) .....................................................................+2C/W JA (Note 1)....................................................................+22C/W Storage Temperature Range .............................-40C to +150C Lead Temperature (soldering, 10s) .................................+300C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS--VGA MODE
(Figure 7, VCC = VREF = 4.75V to 5.25V, VCM = (3/5)VREF, TA = 0C to +70C, VGND = 0, LOW_PWR = 0, M4_EN = 0, CW_FILTER = 0 or 1, TMODE = 0, PD = 0, CW_VG = 1, CW_M1 = 0, CW_M2 = 0, no RF signals applied, capacitance to GND at each of the VGA differential outputs is 60pF, differential capacitance across the VGA outputs is 10pF, RL = 1k, CW mixer outputs pulled up to +11V through four separate 0.1% 115 resistors, all CW channels programmed off. Typical values are at VCC = VREF = 5V, TA = +25C, unless otherwise noted.) (Note 2)
PARAMETER VGA MODE Supply Voltage Range VCC External Reference Voltage Range Total Power-Supply Current VCC Supply Current VREF Current Current Consumption per Amplifier Channel Differential Analog Control Voltage Range Differential Analog Control Common-Mode Voltage Analog Control Input Source/Sink Current LOGIC INPUTS CMOS Input High Voltage CMOS Input Low Voltage VIH VIL 2.3 0.8 V V VCM IVCC IREF Refers to VCC supply current Minimum gain Maximum gain 2.85 VCC VREF (Note 3) Refers to VCC supply current plus VREF current PD = 0 PD =1 4.75 4.75 5 5 204 27 192 12 24 +2 -2 3 4.5 3.15 5 5.25 5.25 231 33 216 15 27 V V mA mA mA mA VP-P V mA SYMBOL CONDITIONS MIN TYP MAX UNITS
2
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Ultrasound VGA Integrated with CW Octal Mixer
DC ELECTRICAL CHARACTERISTICS--CM MIXER MODE
(Figure 7, VCC = VREF = 4.75V to 5.25V, TA = 0C to +70C, VGND = 0, LOW_PWR = 0, M4_EN = 0, CW_FILTER = 0 or 1, TMODE = 0, PD = 0, CW_VG = 0, CW_M1 = 0, CW_M2 = 0, no RF signals applied, capacitance to GND at each of the VGA differential outputs is 60pF, differential capacitance across the VGA outputs is 10pF, RL = 1k, CW mixer outputs pulled up to +11V through four separate 0.1% 115 resistors. Typical values are at VCC = VREF = 5V, TA = +25C, unless otherwise noted.) (Note 2)
PARAMETER CW MIXER MODE Current in Full-Power Mode 5V VCC Supply Current in Full-Power Mode 11V VMIX Supply Current in Full-Power Mode 5V VREF Supply Power Dissipation in Full-Power Mode Current in Low-Power Mode 5V VCC Supply Current in Low-Power Mode 11V VMIX Supply Current in Low-Power Mode 5V VREF Supply Power Dissipation in Low-Power Mode Mixer LVDS LO Input CommonMode Voltage LVDS LO Differential Input Voltage LVDS LO Input Common-Mode Current LVDS LO Differential Input Resistance Mixer IF Common-Mode Output Current DATA Output High Voltage DATA Output Low Voltage ICC_FP IMIX_FP IREF_FP Refers to VCC supply current (all 8 channels) Refers to VMIX supply current (all 8 channels) Refers to VREF supply current (all 8 channels) Total power dissipation (all 8 channels including both 5V (VCC and VREF) and 11V mixer pullup supply power dissipation in the device) (Note 4) LOW_PWR = 1; refers to VCC supply current (all 8 channels) LOW_PWR = 1; refers to VMIX supply current (all 8 channels) LOW_PWR = 1; refers to VREF supply current (all 8 channels) LOW_PWR = 1; total power dissipation (all 8 channels including both 5V (VCC and VREF) and 11V mixer pullup supply power dissipation in the device) (Note 4) Modes 1 and 2 (Note 5) Modes 1 and 2 Per pin Modes 1 and 2 (Note 6) Common-mode current in each of the differential mixer outputs (Note 7) DOUT voltage when terminated in DIN (daisy chain) (Note 8) DOUT voltage when terminated in DIN (daisy chain) (Note 8) 4.5 0.5 200 245 106 17 265 120 21 mA mA mA SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX2036
PDISS_FP
2.15
2.41
W
ICC_LP IMIX_LP IREF_LP
245 53 17
265 60 21
mA mA mA
PDISS_LP
1.81
2.06
W
1.25 0.2 700 150 30 3.25 3.75 200
V mVP-P A k mA V V
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3
Ultrasound VGA Integrated with CW Octal Mixer MAX2036
AC ELECTRICAL CHARACTERISTICS--VGA MODE
(Figure 7, VCC = VREF = 4.75V to 5.25V, VCM = (3/5)VREF, TA = 0C to +70C, VGND = 0, LOW_PWR = 0, M4_EN = 0, CW_FILTER = 1, TMODE = 0, PD = 0, CW_VG = 1, CW_M1 = 0, CW_M2 = 0, VG_CLAMP_MODE = 1, fRF = fLO/16 = 5MHz, capacitance to GND at each of the VGA differential outputs is 60pF, differential capacitance across the VGA outputs is 10pF, RL = 1k, CW mixer outputs pulled up to +11V through four separate 0.1% 115 resistors, differential mixer inputs are driven from a low-impedance source. Typical values are at VCC = VREF = 5V, TA = +25C, unless otherwise noted.) (Note 2)
PARAMETER Mode Select Response Time VGA MODE Differential output capacitance is 10pF, capacitance to GND at each single-ended output is 60pF, RL = 1k No capacitive load, RL = 1k Differential Input Resistance Input Effective Capacitance Differential Output Resistance Maximum Gain Minimum Gain Gain Range TA = +25C, -2.0V < VG_CTL < -1.8V, VREF = 5V Absolute Gain Error TA = +25C, -1.8V < VG_CTL < +1.2V, VREF = 5V TA = +25C, +1.2V < VG_CTL < +2.0V, VREF = 5V VGA Gain Response Time Input-Referred Noise Output-Referred Noise 50dB gain change to within 1dB final value VG_CTL set for maximum gain, no input signal VG_CTL set for +20dB of gain No input signal VOUT = 1.5VP-P, 1kHz offset -55 RIN CIN ROUT fRF = 10MHz, each input to ground 170 SYMBOL CONDITIONS CW_VG set from logic 1 to 0 or from 0 to 1 (Note 9) MIN TYP 2 MAX UNITS s
Large-Signal Bandwidth
f-3dB
VOUT = 1.5VP-P, 3dB bandwidth, gain = 20dB
17 MHz
22 200 15 100 39.5 -10.5 50 0.6 0.5 1.2 1 2 60 120 nV/Hz s nV/Hz dB 230 pF dB dB dB
Second Harmonic
HD2
VG_CLAMP_MODE = 1, VG_CTL set for +20dB of gain, fRF = 5MHz, VOUT = 1.5VP-P VG_CLAMP_MODE = 1, VG_CTL set for +20dB of gain, fRF = 10MHz, VOUT = 1.5VP-P VG_CTL set for +20dB of gain, fRF1 = 5MHz, fRF2 = 5.01MHz, VOUT = 1.5VP-P, VREF = 5V (Note 3) VOUT = 1VP-P differential, fRF = 10MHz, VG_CTL set for +20dB of gain
-62 dBc -62
Third-Order Intermodulation Distortion Channel-to-Channel Crosstalk
IMD3
-40
-52
dBc
-80
dB
4
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Ultrasound VGA Integrated with CW Octal Mixer
AC ELECTRICAL CHARACTERISTICS--CW MIXER MODE (continued)
(Figure 7, VCC = VREF = 4.75V to 5.25V, TA = 0C to +70C, VGND = 0, LOW_PWR = 0, M4_EN = 0, CW_FILTER = 1, TMODE = 0, PD = 0, CW_VG = 0, CW_M1 = 0, CW_M2 = 0, VG_CLAMP_MODE = 1, fRF = fLO/16 = 5MHz, capacitance to GND at each of the VGA differential outputs is 60pF, differential capacitance across the VGA outputs is 10pF, RL = 1k, CW mixer outputs pulled up to +11V through four separate 0.1% 115 resistors, differential mixer inputs are driven from a low-impedance source. Typical values are at VCC = VREF = 5V, TA = +25C, unless otherwise noted.) (Note 2)
PARAMETER Maximum Output Voltage at Clamp ON Maximum Output Voltage at Clamp OFF CW MIXER MODE Mixer RF Frequency Range Mixer LO Frequency Range Mixer IF Frequency Range Maximum Input Voltage Range Differential Input Resistance CW_FILTER = 0 CW_FILTER = 1 Mode 3, fRF = fLO/4 = 1.25MHz, measured at a 1kHz offset frequency; clutter tone at 0.9VP-P differential measured at the mixer input Mode 3, RF terminated into 50; fLO/4 = 1.25MHz, measured at 1kHz offset Third-Order Intermodulation Distortion Mixer Output Voltage Compliance Channel-to-Channel Phase Matching Channel-to-Channel Gain Matching Mode 1, fRF1 = 5MHz at 0.9VP-P differential input, Doppler tone fRF2 = 5.01MHz at 25dBc from clutter tone, fLO/16 = 5MHz (Note 10) (Note 11) Measured under zero beat conditions, fRF = 5MHz, fLO/16 = 5MHz (Note 12) Measured under zero beat conditions, fRF = 5MHz, fLO/16 = 5MHz (Note 12) CW_FILTER = 1 Transconductance (Note 13) fRF = 1.1MHz at 1VP-P differential, fLO/16 = 1MHz fRF = 1.1MHz at 1VP-P differential, fLO/16 = 1MHz 4.75 3 2 633 1440 6 nV/Hz 4.6 0.9 1 7.6 7.5 100 1.8 MHz MHz kHz VP-P differential SYMBOL CONDITIONS VG_CLAMP_MODE = 0, VG_CTL set for +20dB of gain, 350mVP-P differential input VG_CLAMP_MODE = 1, VG_CTL set for +20dB of gain, 350mVP-P differential input MIN TYP 2.2 MAX UNITS VP-P differential VP-P differential
MAX2036
3.4
Input-Referred Noise Voltage
IMD3
-50
dBc
12.00
V Degrees dB
2.8 mS
CW_FILTER = 0 (low LPF cutoff frequency)
2.8
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5
Ultrasound VGA Integrated with CW Octal Mixer MAX2036
AC ELECTRICAL CHARACTERISTICS--CW MIXER MODE (continued)
(Figure 7, VCC = VREF = 4.75V to 5.25V, TA = 0C to +70C, VGND = 0, LOW_PWR = 0, M4_EN = 0, CW_FILTER = 1, TMODE = 0, PD = 0, CW_VG = 0, CW_M1 = 0, CW_M2 = 0, VG_CLAMP_MODE = 1, fRF = fLO/16 = 5MHz, capacitance to GND at each of the VGA differential outputs is 60pF, differential capacitance across the VGA outputs is 10pF, RL = 1k, CW mixer outputs pulled up to +11V through four separate 0.1% 115 resistors, differential mixer inputs are driven from a low-impedance source. Typical values are at VCC = VREF = 5V, TA = +25C, unless otherwise noted.) (Note 2)
PARAMETER SERIAL SHIFT REGISTER Serial Shift Register Programming Rate Minimum Data Set-Up Time Minimum Data Hold Time Minimum Data Clock Time Minimum Data Clock Pulse Width High Minimum Data Clock Pulse Width Low Minimum Load Line Minimum Load Line High to Mixer Clock On Minimum Data Clock to Load Line High tDSU tHLD tDCLK tDCLKPWH tDCLKPWL tLD tMIXCLK tCLH 30 2 100 30 30 30 30 30 10 MHz ns ns ns ns ns ns ns ns SYMBOL CONDITIONS MIN TYP MAX UNITS
Note 2: Specifications at TA = +25C and TA = +70C are guaranteed by production. Specifications at TA = 0C are guaranteed by design and characterization. Note 3: Noise performance of the device is dependent on the noise contribution from the supply to VREF. Use a low-noise supply for VREF. VCC and VREF can be connected together to share the same supply voltage if the supply for VCC exhibits low noise. Note 4: Total on-chip power dissipation is calculated as PDISS = VCC x ICC + VREF x IREF + [11V - (IMIX/4) x 115] x IMIX. Note 5: Note that the LVDS CWD LO clocks are DC-coupled. This is to ensure immediate synchronization when the clock is first turned on. An AC-coupled LO is problematic in that the RC time constant associated with the coupling capacitors and the input impedance of the pin causes there to be a period of time (related to the RC time constant) when the DC level on the chip side of the capacitor is outside the acceptable common-mode range and the LO swing does not exceed both the logic thresholds required for proper operation. This problem associated with AC-coupling would cause an inability to ensure synchronization among beamforming channels. The LVDS signal is terminated differentially with an external 100 resistor on the board. Note 6: External 100 resistor terminates the LVDS differential signal path. Note 7: The mixer common-mode current (3.25mA/channel) is specified as the common-mode current in each of the differential mixer outputs (CW_QOUT+, CW_QOUT-, CW_IOUT+, CW_IOUT-). Note 8: Specification guaranteed only for DOUT driving DIN of the next device in a daisy-chain fashion. Note 9: This response time does not include the CW output highpass filter. When switching to VGA mode, the CW outputs stop drawing current and the output voltage goes to the rail. If a highpass filter is used, the recovery time can be excessive and a switching network is recommended as shown in the Applications Information section. Note 10: See the Ultrasound-Specific IMD3 Specification in the Applications Information section. Note 11: Mixer output-voltage compliance is the range of acceptable voltages allowed on the CW mixer outputs. Note 12: Channel-to-channel gain-and-phase matching measured on 30 pieces during engineering characterization at room temperature. Each mixer is used as a phase detector and produces a DC voltage in the IQ plane. The phase is given by the angle of the vector drawn on that plane. Multiple channels from multiple parts are compared to each other to produce the phase variation. Note 13: Transconductance is defined as the quadrature summing of the CW differential output current at baseband divided by the mixer's input voltage.
6
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Ultrasound VGA Integrated with CW Octal Mixer
Typical Operating Characteristics
(Figure 7, VCC = VREF = 4.75V to 5.25V, VGND = 0, PD = 0, VG_CLAMP_MODE = 1, fRF = 5MHz, capacitance to GND at each of the VGA differential outputs is 60pF, differential capacitance across the VGA outputs is 10pF, RL = 1k, TA = 0C to +70C. Typical values are at VCC = VREF = 5V, VCM = 3.0V, TA = +25C, unless otherwise noted.)
OVERDRIVE PHASE DELAY vs. FREQUENCY
MAX2036 toc01
MAX2036
POWER-SUPPLY MODULATION RATIO
MAX2036 toc02
TWO-TONE ULTRASOUND-SPECIFIC IMD3 vs. GAIN
-10 -20 VOUT = 1VP-P DIFFERENTIAL GAIN = 20dB
MAX2036 toc03
5.0 4.5 OVERDRIVE PHASE DELAY (ns) 4.0 3.5 VIN1 = 35mVP-P DIFFERENTIAL VIN2 = 87.5mVP-P DIFFERENTIAL GAIN = 20dB
-30 -40 -50 VOUT = 1.5VP-P DIFFERENTIAL VMOD = 50mVP-P, fCARRIER = 5MHz, GAIN = 20dB
0
PSMR (dBc)
IMD3 (dBc)
3.0 2.5 2.0 1.5 1.0 0.5 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 FREQUENCY (MHz)
-30 f = 10MHz -40 -50 -60
-60 -70 -80 -90 0 25 50 75 100 125 150 175 200 FREQUENCY (kHz)
-70 -80 -15 -5
f = 2MHz, 5MHz
5
15 GAIN (dB)
25
35
45
SECOND-HARMONIC DISTORTION vs. GAIN
MAX2036 toc04
THIRD-HARMONIC DISTORTION vs. GAIN
-10 -20 -30 HD3 (dBc) f = 12MHz VOUT = 1VP-P DIFFERENTIAL
MAX2036 toc05
0 -10 -20 -30 HD2 (dBc) -40 -50 -60 -70 -80 -90 -100 -15 -5 5 15 GAIN (dB) 25 35 f = 2MHz f = 12MHz f = 5MHz VOUT = 1VP-P DIFFERENTIAL
0
-40 -50 -60 -70 -80 -90
f = 5MHz
f = 2MHz
45
-100 -15 -5 5 15 GAIN (dB) 25 35 45
OVERLOAD RECOVERY TIME
MAX2036 toc06
OVERLOAD RECOVERY TIME
MAX2036 toc07
f = 5MHz
DIFFERENTIAL INPUT 200mV/div
f = 5MHz DIFFERENTIAL INPUT 200mV/div
DIFFERENTIAL OUTPUT 500mV/div
DIFFERENTIAL OUTPUT 500mV/div
OUTPUT OVERLOAD TO 1VP-P
OUTPUT OVERLOAD TO 100mVP-P
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7
Ultrasound VGA Integrated with CW Octal Mixer MAX2036
Typical Operating Characteristics (continued)
(Figure 7, VCC = VREF = 4.75V to 5.25V, VGND = 0, PD = 0, VG_CLAMP_MODE = 1, fRF = 5MHz, capacitance to GND at each of the VGA differential outputs is 60pF, differential capacitance across the VGA outputs is 10pF, RL = 1k, TA = 0C to +70C. Typical values are at VCC = VREF = 5V, VCM = 3.0V, TA = +25C, unless otherwise noted.)
CHANNEL-TO-CHANNEL CROSSTALK vs. GAIN
MAX2036 toc08
CHANNEL-TO-CHANNEL CROSSTALK vs. FREQUENCY
MAX2036 toc09
OUTPUT-REFERRED NOISE VOLTAGE vs. GAIN
OUTPUT-REFERRED NOISE VOLTAGE (nV/Hz) f = 5MHz 70
MAX2036 toc10
-60 -65 -70 CROSSTALK (dB) VOUT = 1.5VP-P DIFFERENTIAL f = 10MHz, ADJACENT CHANNELS
-30 -40 -50 CROSSTALK (dB) -60 -70 -80 -90 -100 -110 1 10 FREQUENCY (MHz) VOUT = 1VP-P DIFFERENTIAL GAIN = 20dB, ADJACENT CHANNELS
80
-75 -80 -85 -90 -95
60
50
40
-100 -15 -5 5 15 GAIN (dB) 25 35 45
30 100 -15 -5 5 15 GAIN (dB) 25 35 45
GAIN vs. DIFFERENTIAL ANALOG CONTROL VOLTAGE (VG_CTL)
MAX2036 toc11
LARGE-SIGNAL BANDWIDTH vs. FREQUENCY
MAX2036 toc12
LARGE-SIGNAL BANDWIDTH vs. FREQUENCY
35 30 GAIN (dB) 25 20 15 10 5 0 0.1 1 10 FREQUENCY (MHz) 100 1000 VOUT = 1.5VP-P DIFFERENTIAL VG_CTL = -0.8VP-P DIFFERENTIAL
MAX2036 toc13 MAX2036 toc16
45 f = 5MHz 35 25 GAIN (dB) 15 5 -5 -15 -2.5 -1.5 -0.5 0.5 1.5
50 45 40 GAIN (dB) 35 30 25 20 15 10 VOUT = 1.5VP-P DIFFERENTIAL VG_CTL = -2VP-P DIFFERENTIAL
40
2.5
0.1
1
10 FREQUENCY (MHz)
100
1000
VG_CTL (VP-P DIFFERENTIAL)
LARGE-SIGNAL BANDWIDTH vs. FREQUENCY
MAX2036 toc14
LARGE-SIGNAL BANDWIDTH vs. FREQUENCY
15 10 GAIN (dB) GAIN (dB) 5 0 -5 -10 -15 -20 VOUT = 1.5VP-P DIFFERENTIAL VG_CTL = +1.2VP-P DIFFERENTIAL
MAX2036 toc15
LARGE-SIGNAL BANDWIDTH vs. FREQUENCY
10 5 0 -5 -10 -15 -20 -25 -30 VOUT = 1.5VP-P DIFFERENTIAL VG_CTL = +1.7VP-P DIFFERENTIAL
30 25 20 GAIN (dB) 15 10 5 0 -5 -10 0.1 1 10 FREQUENCY (MHz) 100 VOUT = 1.5VP-P DIFFERENTIAL VG_CTL = +0.2VP-P DIFFERENTIAL
20
1000
0.1
1
10 100 FREQUENCY (MHz)
1000
0.1
1
10 100 FREQUENCY (MHz)
1000
8
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Ultrasound VGA Integrated with CW Octal Mixer
Typical Operating Characteristics (continued)
(Figure 7, VCC = VREF = 4.75V to 5.25V, VGND = 0, PD = 0, VG_CLAMP_MODE = 1, fRF = 5MHz, capacitance to GND at each of the VGA differential outputs is 60pF, differential capacitance across the VGA outputs is 10pF, RL = 1k, TA = 0C to +70C. Typical values are at VCC = VREF = 5V, VCM = 3.0V, TA = +25C, unless otherwise noted.)
LARGE-SIGNAL BANDWIDTH vs. FREQUENCY
MAX2036 toc17
MAX2036
HARMONIC DISTORTION vs. DIFFERENTIAL OUTPUT VOLTAGE
MAX2036 toc18
HARMONIC DISTORTION vs. DIFFERENTIAL OUTPUT LOAD RESISTANCE
-45 HARMONIC DISTORTION (dBc) -50 -55 -60 -65 -70 -75 -80 -85 -90 -95 -100 SECOND HARMONIC THIRD HARMONIC VOUT = 1VP-P DIFFERENTIAL f = 5MHz, GAIN = 20dB
MAX2036 toc19
0 -5 -10 GAIN (dB) -15 -20 -25 -30 -35 -40 0.1 1 10 100 FREQUENCY (MHz) VOUT = 1VP-P DIFFERENTIAL VG_CTL = +2VP-P DIFFERENTIAL
0 -10 HARMONIC DISTORTION (dBc) -20 -30 -40 -50 -60 -70 -80 -90 -100 SECOND HARMONIC THIRD HARMONIC f = 5MHz, GAIN = 20dB
-40
1000
0
0.5
1.0
1.5
2.0
2.5
3.0
200
500
800
1100
1400
1700
2000
DIFFERENTIAL OUTPUT VOLTAGE (VP-P)
DIFFERENTIAL OUTPUT LOAD ()
HARMONIC DISTORTION vs. DIFFERENTIAL OUTPUT LOAD CAPACITANCE
MAX2036 toc20
HARMONIC DISTORTION vs. FREQUENCY
MAX2036 toc21
TWO-TONE ULTRASOUND-SPECIFIC IMD3 vs. FREQUENCY
VOUT = 1VP-P DIFFERENTIAL GAIN = 20dB
MAX2036 toc22
-40 -45 HARMONIC DISTORTION (dBc) -50 -55 -60 -65 -70 -75 -80 -85 -90 -95 -100 5 25 45 65 85 SECOND HARMONIC THIRD HARMONIC VOUT = 1VP-P DIFFERENTIAL f = 5MHz, GAIN = 20dB
0 -10 HARMONIC DISTORTION (dBc) -20 -30 VOUT = 1VP-P DIFFERENTIAL GAIN = 20dB THIRD HARMONIC
0 -10 -20 IMD3 (dBc) -30 -40 -50 -60 -70 0 5 10 15 20
-40 -50 -60 -70 -80 -90 -100 SECOND HARMONIC
105
0
10
20
30
40
50
25
DIFFERENTIAL OUTPUT LOAD (pF)
FREQUENCY (MHz)
FREQUENCY (MHz)
GAIN ERROR HISTOGRAM
MAX2036 toc23
OUTPUT COMMON-MODE OFFSET VOLTAGE vs. GAIN
MAX2036 toc24
DIFFERENTIAL OUTPUT IMPEDANCE MAGNITUDE vs. FREQUENCY
180 160 ZOUT () 140 120 100 80 60
MAX2036 toc25
50 45 40 35 % OF UNITS 30 25 20 15 10 5 0 -4.50 -3.00 -1.50 0.75 2.25 3.75 -3.75 -2.25 -0.75 1.50 3.00 4.50 GAIN ERROR (dB) SAMPLE SIZE = 188 UNITS fIN_ = 5MHz, GAIN = 20dB
100 75 OFFSET VOLTAGE (mV) 50 25 0 -25 -50 -75 -100 -15 -5 5 15 GAIN (dB) 25 35
200
45
0.1
1
10
100
FREQUENCY (MHz)
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9
Ultrasound VGA Integrated with CW Octal Mixer MAX2036
Typical Operating Characteristics (continued)
(Figure 7, VCC = VREF = 4.75V to 5.25V, VGND = 0, LOW_PWR = 0, M4_EN = 0, CW_FILTER = 1, TMODE = 0, PD = 0, CW_VG = 0, CW_M1 = 0, CW_M2 = 0, CW mixer outputs pulled up to +11V through four separate 0.1% 115 resistors, differential mixer inputs are driven from a low impedance source.)
CW FILTER RESPONSE (CW_FILTER = 1)
MAX2036 toc26
CW FILTER RESPONSE (CW_FILTER = 0)
MAX2036 toc27
4 2 0 -2 LOSS (dB)
5 0 -5 LOSS (dB) -10 -15 -20 -25 -30
-4 -6 -8 -10 -12 -14 0 5 10 FREQUENCY (MHz) 15 20
0
5
10 FREQUENCY (MHz)
15
20
MAX2036 toc28
-48 IMD3 (dBc) -49 -50 -51 -52 -53 -54 0 2 4 FRF (MHz) 6 8 4.75 5.00 5.25
INPUT-REFERRED NOISE (nVHz)
-47
12 10 8 6 4 2 0 0 0.5 1.0 1.5
2.0
CLUTTER VOLTAGE (VP-P DIFF)
10
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MAX2036 toc29
-46
CW IMD3 vs. FREQUENCY (MODE 1, VRF = 900mVP-P DIFFERENTIAL VCC = VREF)
14
INPUT-REFERRED NOISE vs. CLUTTER VOLTAGE (MODE 4, F_CLUTTER = 1.25MHz AT 1kHz OFFSET)
Ultrasound VGA Integrated with CW Octal Mixer
Pin Description
PIN 1 2 3 4 5, 10, 19, 24, 29, 34, 58, 79, 81, 96 6 7 8 9 11 12 13 14 15 16, 42, 46, 54, 72, 82, 87 17 18 20 21 22 23 25 26 27 28 30 31 32 33 35 36 NAME CWIN2CWIN2+ VGIN3VGIN3+ GND CWIN3CWIN3+ VGIN4VGIN4+ CWIN4CWIN4+ EXT_C1 EXT_C2 EXT_C3 VCC VGIN5VGIN5+ CWIN5CWIN5+ VGIN6VGIN6+ CWIN6CWIN6+ VGIN7VGIN7+ CWIN7CWIN7+ VGIN8VGIN8+ CWIN8CWIN8+ FUNCTION CW Mixer Channel 2 Inverting Differential Input CW Mixer Channel 2 Noninverting Differential Input VGA Channel 3 Inverting Differential Input VGA Channel 3 Noninverting Differential Input Ground CW Mixer Channel 3 Inverting Differential Input CW Mixer Channel 3 Noninverting Differential Input VGA Channel 4 Inverting Differential Input VGA Channel 4 Noninverting Differential Input CW Mixer Channel 4 Inverting Differential Input CW Mixer Channel 4 Noninverting Differential Input External Compensation. Connect a 4.7F capacitor to ground as close as possible to the pin to bypass the internal biasing circuitry. External Compensation. Connect a 4.7F capacitor to ground as close as possible to the pin to bypass the internal biasing circuitry. External Compensation. Connect a 4.7F capacitor to ground as close as possible to the pin to bypass the internal biasing circuitry. 5V Power Supply. Connect to an external +5V power supply. Bypass each VCC supply to ground with 0.1F capacitors as close as possible to the pins. VGA Channel 5 Inverting Differential Input VGA Channel 5 Noninverting Differential Input CW Mixer Channel 5 Inverting Differential Input CW Mixer Channel 5 Noninverting Differential Input VGA Channel 6 Inverting Differential Input VGA Channel 6 Noninverting Differential Input CW Mixer Channel 6 Inverting Differential Input CW Mixer Channel 6 Noninverting Differential Input VGA Channel 7 Inverting Differential Input VGA Channel 7 Noninverting Differential Input CW Mixer Channel 7 Inverting Differential Input CW Mixer Channel 7 Noninverting Differential Input VGA Channel 8 Inverting Differential Input VGA Channel 8 Noninverting Differential Input CW Mixer Channel 8 Inverting Differential Input CW Mixer Channel 8 Noninverting Differential Input 5V Reference Supply. Connect to a low-noise power supply. Bypass to GND with a 0.1F capacitor as close as possible to the pins. Note that noise performance of the device is dependent on the noise contribution from the supply to VREF. Use a low-noise supply for VREF. VCC and VREF can be connected together to share the same supply voltage if the supply for VCC exhibits low noise.
MAX2036
37, 93
VREF
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11
Ultrasound VGA Integrated with CW Octal Mixer MAX2036
Pin Description (continued)
PIN 38 NAME EXT_RES FUNCTION External Resistor. Connect a 0.1% 7.5k resistor to ground as close as possible to the pin to set the bias for the internal biasing circuitry. CW Mixer VGA Enable. Selects for VGA or CW mixer operation. Set CW_VG to a logic-high to enable the VGAs while the CW mixers are powered down. Set CW_VG to a logic-low to enable the CW mixers while the VGAs are powered down. Power-Down Switch. Drive PD high to set the device in power-down mode. Drive PD low for normal operation. CW Filter Mode Corner Frequency Select. Selects in corner frequency of the internal lowpass filter for the CW path. Set CW_FILTER to a logic-high for a corner frequency of 9.5MHz. Set CW_FILTER to a logic-low for a corner frequency of 4.5MHz. Mode 4 Enable. Set M4_EN to a logic-high to override the serial port and activate all 8 channels of the CW path. Low-Power Enable. Set high to enable low-power CW mixer mode for the device. Serial Port Data Output. Data output for ease of daisy-chaining CW channels for analog beamforming programming. No Connect. Leave this pin unconnected. CW LO Input for Channel 8. LO clock input for modes 3 and 4. VGA Channel 8 Noninverting Differential Output VGA Channel 8 Inverting Differential Output CW LO Input for Channel 7. LO clock input for modes 3 and 4. VGA Channel 7 Noninverting Differential Output VGA Channel 7 Inverting Differential Output CW LO Input for Channel 6. LO clock input for modes 3 and 4. VGA Channel 6 Noninverting Differential Output VGA Channel 6 Inverting Differential Output CW LO Input for Channel 5. LO clock input for modes 3 and 4. VGA Channel 5 Noninverting Differential Output VGA Channel 5 Inverting Differential Output VGA Analog Gain Control Differential Input. Set the differential to -2V for maximum gain (+39.5dB) and +2V for minimum gain (-10.5dB). CW LVDS LO Inverting Differential Input. LO clock inverting input for modes 1 and 2. CW LVDS LO Noninverting Differential Input. LO clock noninverting input for modes 1 and 2. CW LO Input for Channel 4. LO clock input for modes 3 and 4. VGA Channel 4 Noninverting Differential Output VGA Channel 4 Inverting Differential Output CW LO Input for Channel 3. LO clock input for modes 3 and 4. VGA Channel 3 Noninverting Differential Output VGA Channel 3 Inverting Differential Output CW LO Input for Channel 2. LO clock input for modes 3 and 4. VGA Channel 2 Noninverting Differential Output VGA Channel 2 Inverting Differential Output
39
CW_VG
40
PD
41
CW_FILTER
43 44 45 47 48 49 50 51 52 53 55 56 57 59 60 61 62 63 64 65 66 67 68 69 70 71 73 74 75
M4_EN LOW_PWR DOUT N.C. LO8 VGOUT8+ VGOUT8LO7 VGOUT7+ VGOUT7LO6 VGOUT6+ VGOUT6LO5 VGOUT5+ VGOUT5VG_CTLVG_CTL+ LO_LVDSLO_LVDS+ LO4 VGOUT4+ VGOUT4LO3 VGOUT3+ VGOUT3LO2 VGOUT2+ VGOUT2-
12
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Ultrasound VGA Integrated with CW Octal Mixer
Pin Description (continued)
PIN 76 77 78 80 83 84 85 NAME LO1 VGOUT1+ VGOUT1DIN CLK CW_M1 CW_M2 FUNCTION CW LO Input for Channel 1. LO clock input for modes 3 and 4. VGA Channel 1 Noninverting Differential Output VGA Channel 1 Inverting Differential Output Serial Port Data Input. Data input to program the serial shift registers. Serial Port Data Clock. Clock input for programming the serial shift registers. CW Mode Select Input 1. Input for programming beamforming mode 1, 2, 3, or 4. See Table 1 for mode programming details. CW Mode Select Input 2. Input for programming beamforming mode 1, 2, 3, or 4. See Table 1 for mode programming details.
MAX2036
86
VGA Clamp Mode Enable. Drive VG_CLAMP_MODE high to enable high VGA clamp mode. VGA VG_CLAMP_ output is clamped at typically 2.4VP-P differential. Drive VG_CLAMP_MODE low to enable low VGA MODE clamp mode. VGA output is clamped at typically 2.8VP-P differential. LOAD CW_QOUT+ CW_QOUTCW_IOUTCW_IOUT+ VGIN1VGIN1+ CWIN1CWIN1+ VGIN2VGIN2+ EP Serial Port Load. Loads the data from the serial shift registers into the I/Q phase dividers. Pull LOAD bus from high to low, and from low to high for programming the I/Q phase dividers. CW Mixer Noninverting Differential Quadrature Output. CW Mixer output for 8 quadrature mixers combined. CW Mixer Inverting Differential Quadrature Output. CW Mixer output for 8 quadrature mixers combined. CW Mixer Inverting Differential In-Phase Output. CW mixer output for 8 in-phase mixers combined. CW Mixer Noninverting Differential In-Phase Output. CW Mixer output for 8 in-phase mixers combined. VGA Channel 1 Inverting Differential Input VGA Channel 1 Noninverting Differential Input CW Mixer Channel 1 Inverting Differential Input CW Mixer Channel 1 Noninverting Differential Input VGA Channel 2 Inverting Differential Input VGA Channel 2 Noninverting Differential Input Exposed Pad. Internally connected to GND. Connect EP to a large PCB ground plane to maximize thermal performance.
88 89 90 91 92 94 95 97 98 99 100 --
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13
Ultrasound VGA Integrated with CW Octal Mixer MAX2036
Detailed Description
The MAX2036 is an 8-channel VGA integrated with a programmable octal quadrature mixer array designed for ultrasound imaging and Doppler applications. The device is optimized for efficient power consumption, high dynamic range, and exceptionally low-noise performance. The VGA path features differential inputs, analog variable gain control, differential outputs for direct ADC drive, and a selectable output voltage clamp to avoid ADC overdrive. The integrated octal quadrature mixer array includes serial-programmable LO phase generators for CWD beamforming applications. The LO phase dividers can be programmed for 4, 8, or 16 quadrature phases. Lowpass filters are integrated at the input paths of each CW mixer. The outputs for the mixers are summed into single I/Q differential current outputs. The MAX2036 also integrates an octal quadrature mixer array and programmable LO phase generators for a complete continuous wave (CW) Doppler beamforming solution. The LO phase selection for each channel is programmed using a digital serial interface and a single high-frequency clock, or the LOs for each complex mixer pair can be directly driven using separate 4 x LO clocks. The serial interface is designed to allow multiple devices to be easily daisy chained in order to minimize program interface wiring. The LO phase dividers can be programmed to allow 4, 8, or 16 quadrature phases. The input path of each CW mixer consists of a selectable lowpass filter for optimal CWD noise performance. The outputs of the mixers are summed into single I and Q differential current outputs. The mixers and LO generators are designed to have exceptionally low noise performance of -155dBc/Hz at 1kHz offset from a 1.25MHz carrier, measured with 900mVP-P differential clutter signal.
High-Level Wave Mixer and Programmable Beamformer Functional Diagram
+5V +5V (LOW NOISE)
VCC
VREF
VG_CTL+ VG_CTLVGIN1+ VGIN1* * * * * *
MAX2036
50 VGA 50
** ** ** * * *
VG_CLAMP_MODE VGOUT1+ VGOUT1* * *
50 VGIN8+ VGIN850 LOW_PWR PD CWIN1+ I&Q CWIN1* * * * * * * * * * * * * * * * * * * * * * * * * * *
VGA
VGOUT8+ VGOUT8-
CW_IOUT+ CW_IOUT-
CWIN8+ I&Q CWIN8-
CW_QOUT+ CW_QOUT-
Variable Gain Amplifier (VGA)
The MAX2036's VGAs are optimized for high linearity, high dynamic range, and low output-noise performance, making this component ideal for ultrasound imaging applications. The VGA paths also exhibit a channel-to-channel crosstalk of -80dB at 10MHz and an absolute gain error of less than 0.5dB for minimal channel-to-channel focusing error in an ultrasound system. Each VGA path includes circuitry for adjusting analog gain, an output buffer with differential output ports (VGOUT_+, VGOUT_-) for driving ADCs, and differential input ports (VGIN_+, VGIN_-), which are ideal for directly interfacing to the MAX2034 quad LNA. See the High-Level Wave Mixer and Programmable BeamFormer Functional Diagram for details.
CW_VG CW_FILTER GND
The VGA has an adjustable gain range from -10.5dB to +39.5dB, achieving a total dynamic range of 50dB (typ). The VGA gain can be adjusted using the differential gain-control inputs VG_CTL+ and VG_CTL-. Set the differential gain-control input voltage at +2V for minimum gain and -2V for maximum gain. The differential analog control common-mode voltage is 3V (typ).
14
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Ultrasound VGA Integrated with CW Octal Mixer
VGA Clamp
A clamp is provided to limit the VGA output signals to avoid overdriving the ADC or to prevent ADC saturation. Set VG_CLAMP_MODE low to clamp the VGA differential outputs at 2.2VP-P. Set the VG_CLAMP_MODE high to disable the clamp.
Octal Continuous Wave (CW) Mixer
The MAX2036 CW mixers are designed using an active double-balanced topology. The mixers achieve high dynamic range and high-linearity performance, with exceptionally low noise, which is ideal for ultrasound CWD signal reception. The octal quadrature mixer array provides noise performance of -155dBc/Hz at 1kHz from a 1.25MHz carrier, and a two-tone, thirdorder, ultrasound-specific intermodulation product of typically -50dBc. See the Ultrasound-Specific IMD3 Specification in the Applications Information section. The octal array exhibits quadrature and in-phase differential current outputs (CW_QOUT+, CW_QOUT-, CW_IOUT+, CW_IOUT-) to produce the total CWD beamformed signal. The maximum differential current output is typically 3mAP-P and the mixer output-compliance voltage ranges from 4.75V to 12V.
MAX2036
Power-Down
The device can also be powered down with PD. Set PD to logic-high for power-down mode. In power-down mode, the device draws a total supply current of 27mA. Set PD to a logic-low for normal operation
Overload Recovery
The device is also optimized for quick overload recovery for operation under the large input-signal conditions that are typically found in ultrasound input buffer imaging applications. See the Typical Operating Characteristics for an illustration of the rapid recovery time from a transmit-related overload.
High-Level CW Mixer and Programmable Beamformer Functional Diagram
VCC VREF CW_FILTER M4_EN
CWIN8 * * * CWIN2
* * *
MAX2036
CW_IOUT+ CW_IOUTCW_IOUT2+ ** ** ** CW_QOUT** ** ** CW_QOUT+
CWIN1 CW_QOUT2-
IQ CHANNEL 1 I/Q DIVIDER PHASE SELECTOR 5 5-BIT SR
IQ CHANNEL 2 I/Q DIVIDER PHASE SELECTOR 5 5-BIT SR
IQ LO1 CHANNEL 8 I/Q DIVIDER PHASE SELECTOR 5 5-BIT SR
LO_LVDS+ LO_LVDSLOAD
LO2 * * * LO8
** ** ** * * *
DIN CLK
* * *
** ** **
DOUT
CW_M1
CW_M2
GND
LOW_PWR
PD
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15
Ultrasound VGA Integrated with CW Octal Mixer MAX2036
CW Mixer Output Summation
The outputs from the octal mixer array are summed internally to produce the total CWD summed beamformed signal. The octal array produces eight differential quadrature (Q) outputs and eight differential in-phase (I) outputs. All quadrature and in-phase outputs are summed into single I and Q differential current outputs (CW_QOUT+, CW_QOUT-, CW_IOUT+, CW_IOUT-). the divide-by-16 circuit. The first 4 bits of the shift register are for programming the 16 phases; the fifth bit turns each channel on/off individually. For mode 1, set both CW_M1 and CW_M2 to a logic-low. See Table 2.
Table 2. Mode 1 Logic Table (B4 = 0: Channel On/B4 = 1 Channel Off)
MODE 1 CW_M1 = 0 CW_M2 = 0 PHASE (DEG) 0 22.5 45 67.5 90 112.5 135 157.5 180 202.5 225 247.5 270 292.5 315 337.5 MSB D (B0) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 C (B1) 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B (B2) 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 LSB A (B3) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 SHUTDOWN SD (B4) 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
LO Phase Select
The LO phase dividers can be programmed through the shift registers to allow for 4, 8, or 16 quadrature phases for a complete CW beamforming solution.
CWD Beamforming Modes
There are four separate modes of operating the CWD beamformer. See Table 1 for a summary of the different modes of operation. The mode of operation can be selected by the CW_M1 and CW_M2 logic inputs. Phase generation is controlled through the serial interface. See the Serial Interface section in the Applications Information section for details on how to program for different quadrature phases.
Mode 1 For mode 1 operation, the LO_LVDS input frequency is typically 16 x fLO. As the CWD LO frequency range is 1MHz to 7.5MHz, the input frequency ranges from 16MHz to 120MHz. This high LO clock frequency requires a differential LVDS input. The 16 x fLO input is then divided by 16 to produce 16 phases. These 16 phases are generated for each of the 8 channels and programmed for the selected phase by a serial shift register. Each channel has a corresponding 5-bit shift register, which is used to program the output phase of
Table 1. Summary of CWD Beamforming Methods
LO INPUT CLOCK PHASE FREQUENCY INTERFACE RESOLUTION NO. OF CLOCK INPUTS PER CHIP 1 1 8 8 PROGRAM BY SERIAL SHIFT REGISTER (SSR) Yes Yes Yes No NO. OF USEFUL BITS IN SSR 4 3 2 N/A NO. OF DON'TCARE BITS IN SSR 0 1 MSB 2 MSBs N/A
CW_M1
CW_M2 MODE
0 0 1 1
0 1 0 1
1 2 3 4
16 x 8x 4x 4x
LVDS LVDS 3V CMOS 3V CMOS
16 phases 8 phases 4 phases Quadrature provided
N/A = Not applicable.
16
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Ultrasound VGA Integrated with CW Octal Mixer
Mode 2 The LO_LVDS input frequency is 8 x fLO (typ) for mode 2 operation. The CWD LO frequency range is 1MHz to 7.5MHz, and the input frequency ranges from 8MHz to 60MHz. This high LO clock frequency requires a differential LVDS input. The 8 x fLO input is then divided by 8 to produce 8 phases. These 8 phases are generated for each of the 8 channels and programmed for the selected phase by the serial shift register. Note that the serial shift register is common to modes 1, 2, and 3, where each channel has a corresponding 5-bit shift register, which is used to program the output phase. However, since mode 2 generates 8 phases only, 3 of the 4 phase-programming bits are used; 5 bits are still loaded per channel using the serial shift register, but the phase-programming MSB is a don't-care bit. The fifth bit in the shift register always turns each channel on/off individually. For mode 2, set CW_M1 to a logiclow and set CW_M2 to a logic-high. See Table 3.
MAX2036
Table 4. Mode 3 Logic Table (DC = Don't Care, B4 = 0: Channel On/B4 = 1: Channel Off)
MODE 3 CW_M1 = 1 CW_M2 = 0 PHASE (DEG) 0 90 180 270 D (B0) DC DC DC DC C (B1) DC DC DC DC B (B2) 0 0 1 1 A (B3) 0 1 0 1 SHUTDOWN SD (B4) 0/1 0/1 0/1 0/1
Table 3. Mode 2 Logic Table (DC = Don't Care, B4 = 0: Channel On/B4 = 1: Channel Off)
MODE 2 CW_M1 = 0 CW_M2 = 1 PHASE (DEG) 0 45 90 135 180 225 270 315 SHUTDOWN D (B0) DC DC DC DC DC DC DC DC C (B1) 0 0 0 0 1 1 1 1 B (B2) 0 0 1 1 0 0 1 1 A (B3) 0 1 0 1 0 1 0 1 SD (B4) 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
generated for each of the 8 channels and programmed for the selected phase by the serial shift register. For mode 3, 4 phases are generated, and only 2 of the 4 phase-programming bits are required where the 2phase programming MSBs are don't-care bits. For mode 3, set CW_M1 to a logic-high and set CW_M2 to a logic-low. See Table 4.
Mode 4 The LO_LVDS input is not used in this mode. The appropriate phases are externally provided using separate 4 x fLO LO1-LO8 inputs for each channel. A 4 x fLO input is required so the device can internally generate accurate duty-cycle independent quadrature LO drives. Note that the serial shift register is not used in this mode. The CWD LO frequency range is 1MHz to 7.5MHz and the input frequency ranges from 4MHz to 30MHz. The appropriate inputs are provided at LO1 to LO8. A reset line is provided to the customer so that all the CWD channels can be synchronized. The reset line is implemented through the RESET. For mode 4, set both CW_M1 and CW_M2 to logic-high. See Table 5.
Table 5. Mode 4 Logic Table
MODE 4 CW_M1 = 1 CW_M2 = 1 PHASE (DEG) Serial bus not used in mode 4 D (B0) N/A C (B1) N/A B (B2) N/A A (B3) N/A SHUTDOWN SD (B4) N/A
Mode 3 The LO_LVDS input is not used in this mode. Separate 4 x fLO clock inputs are provided using LO1-LO8 for each channel. The CWD LO frequency range is 1MHz to 7.5MHz, and the input frequency provides ranges from 4MHz to 30MHz. Note that the LO clock frequency can utilize 3V CMOS inputs. The 4 x fLO LO1-LO8 inputs are divided by 4 to produce 4 phases. These 4 phases are
N/A = Not applicable.
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17
Ultrasound VGA Integrated with CW Octal Mixer MAX2036
CHANNEL 1 A B C D SD DATA_IN CLOCK B3 B2 B1 B0 B4 CHANNEL 2 A B C D SD B3 B2 B1 B0 B4 CHANNEL 3 A B C D SD B3 B2 B1 B0 B4 CHANNEL 4 A B C D SD B3 B2 B1 B0 B4
CHANNEL 5 A B C D SD B3 B2 B1 B0 B4
CHANNEL 6 A B C D SD B3 B2 B1 B0 B4
CHANNEL 7 A B C D SD B3 B2 B1 B0 B4
CHANNEL 8 A B C D SD B3 B2 B1 B0 B4 DATA_OUT
Figure 1. Data Flow of Serial Shift Register
Synchronization
Figure 1 illustrates the serial programming of the 8 individual channels through the serial data port. Note that the serial data can be daisy chained from one part to another, allowing a single data line to be used to program multiple chips in the system.
CW Lowpass Filter
The MAX2036 also includes selectable lowpass filters between each CW differential input pair and corresponding mixer input. Shunt capacitors and resistors are integrated on chip for high band and low band. The parallel capacitor/resistor networks, which appear differentially across each of the CW differential inputs, are selectable through the CW_FILTER. Drive CW_FILTER high to set the corner frequency of the filter to be fC = 9.5MHz. Drive CW_FILTER low to set the corner frequency equal to fC = 4.5MHz. The CW_VG allows the filter inputs to be disconnected from input nodes (internal to chip) to prevent overloading the LNA output and to not change the PW input common-mode voltage.
mixer array is enabled while the VGA path is powered down (CW mode). During VGA mode, besides powering down the CW mixer array, the differential inputs to the lowpass filters and CW mixers also are internally disconnected from the input nodes, making the CW differential inputs (CWIN_+, CWIN_-) high impedance. The CW mode disconnects the VGA inputs internally from the input ports of the device. For VGA mode, set CW_VG to a logic-high, while for CW mode, set CW_VG to a logic- low.
Power-Down and Low-Power Modes
During device power-down, both the VGA and CW mixer are disabled regardless of the logic set at CW_VG. Both the VGA and CW mixer inputs are high impedance since the internal switches to the inputs are all disconnected. The total supply current of the device reduces to 27mA. Set PD to a logic-high for device power-down. A low-power mode is available to lower the required power for CWD operation. When selected, the complex mixers operate at lower quiescent currents and the total per-channel current is lowered to 53mA. Note that operation in this mode slightly reduces the dynamic performance of the device. Table 6 shows the logic function of standard operating modes.
VGA and CW Mixer Operation
During normal operation, the MAX2036 is configured such that either the VGA path is enabled while the mixer array is powered down (VGA mode), or the quadrature
Table 6. Logic Function of Standard Operating Modes
PD CW_VG INPUT INPUT 1 1 0 0 0 1 0 0 0 1 LOW_PWR N/A N/A 0 1 N/A VGA Off Off Off Off On CW MIXER Off Off On On Off INTERNA INTERNAL L SWITCH SWITCH TO LPF TO VGA AND CW MIXER Off Off Off Off On Off Off On On Off 5V VCC CURRENT CONSUMPTION (mA) 27 27 245 245 204 11V VMIX CURRENT CONSUMPTION (mA) 0 0 106 53 0
N/A = Not applicable.
18 ______________________________________________________________________________________
Ultrasound VGA Integrated with CW Octal Mixer
Applications Information
Mode Select Response Time
The mode select response time is the time that the device takes to switch between CW and VGA modes. One possible approach to interfacing the CW outputs to an instrumentation amplifier used to drive an ADC is shown in Figure 2. In this implementation, there are four large-value (in the range of 470nF to 1F) capacitors between each of the CW_IOUT+, CW_IOUT-, CW_QOUT+, CW_QOUT- outputs and the circuitry they are driving. The output of the CW mixer usually drives the input of an instrumentation amplifier made up of op amps whose input impedance is set by common-mode setting resistors. The highpass pole in this case is at fP = 1/(2 x pi x RC) ~ 5Hz. Note that this low highpass corner frequency is required in order to filter the downconverted clutter tone, which appears at DC, but not interfere with CWD imaging at frequencies as low as 400Hz. For example, if one wanted to use CWD down to 400Hz, then a good choice for the highpass pole would be at least a decade below this (< 40Hz) as not to incur rolloff due to pole. Remember, if the highpass pole is set to 400Hz, the response is 3dB down at that corner frequency. The placement of the highpass pole at 5Hz in the above example is between the DC and 40Hz limitations just discussed. The bottom line is that any reasonably sized DC block between the output of the mixer and the instrumentation amplifier pose a significant time constant that slows the mode select switching speed. An alternative solution to the approach in Figure 2, which enables faster mode select response time, is shown in Figure 4.
MAX2036
115
115 1F
CW_IOUT-
50
31.6k 0.022F 31.6k +11V
CW_IOUT+ 1F
Figure 2. Typical Example of a CW Mixer's Output Circuit
There are clearly both a highpass corner and a lowpass corner present in this output network. The lowpass corner is set primarily by the 115 mixer pullup resistors, the series 50 resistors, and the shunt 0.022F capacitor. This lowpass corner is used to filter a combination of LO leakage and upper sideband. The highpass corner, however, is of a larger concern due to the fact that it is dominated by the combination of a 1F DC blocking capacitor and the pair of shunt 31.6k resistors. If drawn, the simplified dominant highpass network would look like Figure 3.
1F
+5V
Figure 4. Improved Mode Select Response Time Achieved with DC-Coupled Input to Instrumentation Amplifier
31.6k
In Figure 4, the outputs of the CWD mixers are DCcoupled into the inputs of the instrumentation amplifiers. Therefore, the op amps must be able to accommodate the full compliance range of the mixer outputs, which is a maximum of +11V when the mixers are disabled, down to the +5V supply of the MAX2036 when the mixers are enabled. The op amps can be powered from +11V for the high rail and +5V for the low rail, requiring a 6V op amp.
Figure 3. Simplified Circuit of Highpass Pole
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Ultrasound VGA Integrated with CW Octal Mixer MAX2036
Serial Interface
The serial interface of the MAX2036 programs the LO for 16, 8, or 4 quadrature phases using a serial shift register implementation. Data is shifted into the device on DIN. The serial shift register clock is applied to the CLK input. The serial shift register has 5 bits per channel. The first 4 bits are for phase programming, and the fifth bit enables or disables each channel of the mixer array. Each mixer can be programmed to 1 of 16 phases; therefore, 4 bits are required for each channel for programming. The master high-frequency mixer clock is applied to differential inputs LO_LVDS+ and LO_LVDS(for modes 1 and 2) and LO_ (for modes 3 and 4). The LOAD input is provided to allow the user to load the phase counters with the programming values to generate the correct LO phases. The input signals for mixing are applied to the eight differential inputs, CWIN_+ and CWIN_-. The summed I/Q baseband differential outputs are provided on CW_IOUT+/- and CW_QOUT+/-. CW_M1 and CW_M2 are used to select one of the four possible modes of operation. See Table 1. The serial interface is designed to allow multiple devices to be easily daisy chained in order to minimize program interface wiring. DOUT is available for this daisy-chain function.
Programming the Beamformer
During normal CWD operation, the mixer clock at LO_ or CW_LVDS is on and the programming signals on DIN, CLK, and LOAD are off. (LOAD = high, CLOCK = low, and DATA_IN = don't care, but fixed to a high or low). To start the programming sequence, turn off the mixer clock. Data is shifted into the shift register at a recommended 10MHz programming rate or 100ns minimum data clock period/time. See Figure 5 for timing details. After the shift registers are programmed, pull the LOAD bus to logic-low and then back to logic-high to load the internal counters into I/Q phase divider/selectors with the proper values. LOAD must remain low for a minimum time of tCLH. The user turns on the mixer clock to start beamforming. The clock must turn on such that it starts at the beginning of a mixer clock cycle.
tDSU tHLD tCLH
DIN
CLK
LOAD
tDCLKPWH
tDCLKPWL
tDCLK MIXER CLOCK ON MIXER CLOCK OFF
tLD
tLDMIXCLK MIXER CLOCK ON
MIXER CLOCK ON
MIXER CLOCK OFF
MIXER CLOCK OFF
MIXER CLOCK ON
Figure 5. Shift Register Timing Diagram
20
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Ultrasound VGA Integrated with CW Octal Mixer
CW Mixer Output Summation
The maximum differential current output is typically 3mA P-P and the mixer output compliance voltage ranges from 4.75V to 12V per mixer channel. The mixer common-mode current in each of the differential mixer outputs is typically 3.25mA. The total summed current would equal N x 3.25mA in each of the 115 load resistors (where N = number of channels). In this case, the quiescent output voltage at +VSUM and -VSUM outputs would be +11V - (N x 3.25mA x 115) = +11 - (8 x 3.25mA x 115) = 8.05V. The voltage swing at each output, with one channel driven at max output current (differential 3mA P-P ) while the other channels are not driven, would be 1.5mAP-P x 115 or 174mVP-P and the differential voltage would be 348mVP-P. The voltage compliance range is defined as the valid range for +VSUM and -VSUM in this example.
Ultrasound-Specific IMD3 Specification
Unlike typical communications specs, the two input tones are not equal in magnitude for the ultrasoundspecific IMD3 two-tone specification. In this measurement, f1 represents reflections from tissue and f2 represents reflections from blood. The latter reflections are typically 25dB lower in magnitude, and hence the measurement is defined with one input tone 25dB lower than the other. The IMD3 product of interest (f1 - (f2 - f1)) presents itself as an undesired Doppler error signal in ultrasound applications. See Figure 6.
MAX2036
-25dB
External Compensation
External compensation is required for bypassing internal biasing circuitry. Connect, as close as possible, individual 4.7F capacitors from each pin EXT_C1, EXT_C2, and EXT_C3 (pins 13, 14, 15) to ground.
ULTRASOUND IMD3
External Bias Resistor
An external resistor at EXT_RES is required to set the bias for the internal biasing circuitry. Connect, as close as possible, a 7.5k (0.1%) resistor from EXT_RES (pin 38) to ground.
f1 - (f2 - f1) f1 f2 f2 + (f2 - f1)
Analog Input and Output Coupling
In typical applications, the MAX2036 is being driven from a low-noise amplifier (such as the MAX2034) and the VGA is typically driving a discrete differential antialias filter into an ADC (such as the MAX1436 octal ADC). The differential input impedance of the MAX2036 is typically 240. The differential outputs of the VGA are capable of driving a differential load capacitance to GND at each of the VGA differential outputs of 60pF, and differential capacitance across the VGA outputs is 10pF, RL = 1k. The differential outputs have a common-mode bias of approximately 3.75V. AC-couple these differential outputs if the next stage has a different common-mode input range.
Figure 6. Ultrasound IMD3 Measurement Technique
PCB Layout
The pin configuration of the MAX2036 is optimized to facilitate a very compact physical layout of the device and its associated discrete components. A typical application for this device might incorporate several devices in close proximity to handle multiple channels of signal processing. The exposed pad (EP) of the MAX2036's TQFP-EP package provides a low thermal-resistance path to the die. It is important that the PCB on which the MAX2036 is mounted be designed to conduct heat from the EP. In addition, provide the EP with a low-inductance path to electrical ground. The EP MUST be soldered to a ground plane on the PCB, either directly or through an array of plated via holes.
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21
MAX2036
Ultrasound VGA Integrated with CW Octal Mixer
Figure 7. Typical per-Channel Ultrasound Imaging Application
VG_CTL+ VCC VGOUT_+ VGIN_+ ZIN IN CONTROL D2, D1, D0 VGIN_VGOUT_+VMIX 50 0.1F 50 0.1F TO 10-BIT IMAGING ADC VREF THIRD-ORDER BUTTERWORTH ANTI-ALIAS FILTER. VG_CTL115 100nF 100nF 100nF CWIN_+ 12H CW_IOUT+ 100nF ONE CHANNEL MAX2034 CW_VG CW_FILTER ONE CHANNEL 12H CWIN_CW_IOUTCW_QOUTCW_QOUT+ CWD Q CHANNELS IN TO Q CHANNEL CWD LO DIVIDER CWD I/Q LO ADC 115 TO I CHANNEL CWD ADC CWD I CHANNELS IN
22
MAX2036
115 115 GND +VMIX
+V
+VIN
-V
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100nF
Ultrasound VGA Integrated with CW Octal Mixer
Pin Configuration
TOP VIEW LO_LVDS+ LO_LVDSVGOUT4+ LO4 VGOUT3VGOUT3+ LO3 VGOUT4VGOUT5VGOUT5+ VGOUT2+ LO2 VG_CTL+ VG_CTLLO5 GND VGOUT6VGOUT7VGOUT7+ LO7 VGOUT6+ LO6 VCC VGOUT2-
MAX2036
75 74 73
72
VCC
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
LO1 VGOUT1+ VGOUT1GND DIN GND VCC CLK CW_M1 CW_M2 VG_CLAMP_MODE VCC LOAD CW_QOUT+ CW_QOUTCW_IOUTCW_IOUT+ VREF VGIN1VGIN1+ GND CWIN1CWIN1+ VGIN2VGIN2+
51
76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26
VGOUT8VGOUT8+ LO8 N.C. VCC DOUT LOW_PWR M4_EN VCC CW_FILTER PD CW_VG EXT_RES VREF CWIN8+ CWIN8GND VGIN8+ VGIN8CWIN7+ CWIN7GND VGIN7+ VGIN7CWIN6+
MAX2036
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 EXT_C1 EXT_C2 GND CWIN4CWIN4+ EXT_C3 VCC VGIN5VGIN4+ VGIN5+ GND CWIN5CWIN5+ VGIN6+ GND CWIN6VGIN6-
CWIN2CWIN2+
VGIN3VGIN3+ GND CWIN3CWIN3+ VGIN4-
TQFP
Chip Information
PROCESS: Silicon Complementary Bipolar
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE 100 TQFP-EP PACKAGE CODE C100E+3 DOCUMENT NO. 21-0116
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 23
(c) 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

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